Renesas SuperH SH-4A - FPCHG (Pr-Bit Change): Floating-Point Instruction

Rev. 1.50, 10/04, page 406 of 448
10.3.17 FPCHG (Pr-bit Change): Floating-Point Instruction
Format Operation Instruction Code Cycle T Bit
FPCHG ~FPSCR.PR → FPSCR.PR 1111011111111101 1 —
Description: This instruction inverts the PR bit of the floating-point status register FPSCR. The
value of this bit selects single-precision or double-precision operation.
Notes: None
Operation:
void FPCHG(){/* FPCHG */}
{
FPSCR ^= 0x00080000; /* bit 19 */
PC += 2;
}
Possible Exceptions: None