Rev. 1.50, 10/04, page 268 of 448
Example:
Address
1000 MOV #H'80,R1 ;R1 = H'FFFFFF80
1002 MOV.W IMM,R2 ;R2 = H'FFFF9ABC IMM means (PC + 4 + H'08)
1004 ADD #-1,R0 ;
1006 TST R0,R0 ;
1008 MOV.L @(3*,PC),R3 ;R3 = H'12345678
100A BRA NEXT ;Delayed branch instruction
100C NOP
100E IMM .data.w H'9ABC ;
1010 .data.w H'1234 ;
1012 NEXT JMP @R3 ;Distination of BRA branch instruction
1014 CMP/EQ #0,R0 ;
.align 4 ;
1018 .data.l H'12345678 ;
101C .data.l H'9ABCDEF0 ;
Note: * The assembler of Renesas Technology uses the value after scaling (×1, ×2, or ×4) as
the displacement (disp).
Possible Exceptions: Exceptions may occur when PC-relative load instruction is executed.
• Data TLB multiple-hit exception
• Slot illegal instruction exception
• Data TLB miss exception
• Data TLB protection violation exception
• Data address error
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