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Renesas SuperH SH-4A - Page 216

Renesas SuperH SH-4A
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Rev. 1.50, 10/04, page 196 of 448
Bit Bit Name
Initial
Value R/W Description
5 to 0 L1DSZ Undefined R/W L Memory Page 1 Block Transfer Destination Address
Select
When MMUCR.AT = 0 or RAMCR.RP = 0, these bits
select whether the operand addresses or L1DADR
values are used as bits 15 to 10 of the transfer
destination physical address for block transfer to page 1
in the L memory. L1DSZ bits [5:0] correspond to the
transfer destination physical addresses [15:10].
0: The operand address is used as the transfer
destination physical address.
1: The L1DADR value is used as the transfer
destination physical address.
Settable values:
111111: Transfer destination physical address is
specified in 1-Kbyte units.
111110: Transfer destination physical address is
specified in 2-Kbyte units.
111100: Transfer destination physical address is
specified in 4-Kbyte units.
111000: Transfer destination physical address is
specified in 8-Kbyte units.
110000: Transfer destination physical address is
specified in 16-Kbyte units.
100000: Transfer destination physical address is
specified in 32-Kbyte units.
000000: Transfer destination physical address is
specified in 64-Kbyte units.
Settings other than the ones given above are
prohibited.

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