Renesas SuperH SH-4A - Page 266

Rev. 1.50, 10/04, page 246 of 448
Notes: With the exception of LDC Rm,GBR and LDC.L @Rm+,GBR, the LDC/LDC.L
instructions are privileged instructions and can only be used in privileged mode. Use in user mode
will cause an illegal instruction exception. However, LDC Rm,GBR and LDC.L @Rm+,GBR can
also be used in user mode.
With the LDC Rm, Rn_BANK and LDC.L @Rm, Rn_BANK instructions, Rn_BANK0 is
accessed when the RB bit in the SR register is 1, and Rn_BANK1 is accessed when this bit is 0.
Operation:
LDCGBR(int m) /* LDC Rm,GBR */
{
GBR = R[m];
PC += 2;
}
LDCVBR(int m) /* LDC Rm,VBR : Privileged */
{
VBR = R[m];
PC += 2;
}
LDCSGR(int m) /* LDC Rm,SGR : Privileged */
{
SGR = R[m];
PC += 2;
}
LDCSSR(int m) /* LDC Rm,SSR : Privileged */
{
SSR = R[m],
PC += 2;
}
LDCSPC(int m) /* LDC Rm,SPC : Privileged */
{
SPC = R[m];
PC += 2;
}