Rev. 1.50, 10/04, page 303 of 448
Note: In a delayed branch, the actual branch operation occurs after execution of the slot
instruction, but instruction execution (register updating, etc.) is in fact performed in
delayed branch instruction → delay slot instruction order. For example, even if the register
holding the branch destination address is modified in the delay slot, the branch destination
address will still be the register contents prior to the modification.
Possible Exceptions:
• General illegal instruction exception
• Slot illegal instruction exception
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