Renesas SuperH SH-4A

Rev. 1.50, 10/04, page 324 of 448
STCMSGR(int n) /* STC.L SGR,@-Rn : Privileged */
{
R[n] –= 4;
Write_Long(R[n],SGR);
PC += 2;
}
STCMDBR(int n) /* STC.L DBR,@-Rn : Privileged */
{
R[n] –= 4;
Write_Long(R[n],DBR);
PC += 2;
}
STCMRm_BANK(int n) /* STC.L Rm_BANK,@-Rn : Privileged */
/* m=0–7 */
{
R[n] –= 4;
Write_Long(R[n],Rm_BANK);
PC += 2;
}
Possible Exceptions:
• Data TLB multiple-hit exception
• General illegal instruction exception
• Slot illegal instruction exception
• Data TLB miss exception
• Data TLB protection violation exception
• Initial page write exception
• Data address error