LED INDICATORS
The /TRIP DIS LED signal comes from the Relay I/O through edge connector terminal P1-C14; however, U309 originates the
signal through the TRIP DIS output at edge connector terminal P1-A14. When TRIP DIS is high, U309 will also make U322-13
high. This causes PROTECTION indicator DS301 to light red when the /TRIP DIS LED signal goes low. When the /TRIP
DISABLE LED signal is high, U309 will make U322-13 low thereby causing DS1 to light green. Data latch U322 also drives LED
indicators DS302A through DS304.
FRONT PANEL INTERFACING
The WRDISPL signal latches the lower eight address lines onto octal flip-flop U320; the data bus data is latched onto octal flip-
flop U321. This information is used to write to the displays on the RFL 93B DISPLAY's front panel, and read the keypad. The
keypad readings are brought in from the front panel through hex inverting Schmitt trigger U319 and fed to the microcontroller's
I/O port 0.
SINGLE-POLE CHASSIS INTERFACING
Initialization
The Display Controller works hand-in-hand with the Supervisor Controller to both initialize and monitor the interface between
the RFL 9300 relay and the Single-Pole chassis.
The Supervisor will test SP_DETECT. If this line is low it indicates that the single-pole chassis is present in the system. In
that case, the generic Single-Pole chassis alarm (Alarm #54) will become active and the alarm message will be transmitted
to the Display Controller. Meanwhile the Display Controller, on power-up, will always transmit at least one 16-bit initialization
message to the Single-Pole chassis whether the chassis is present in the system or not. This message will contain trip tar-
gets, current sense targets, and the trip release code all previously stored in non-volatile ram. The message will also contain
a bit signifying whether the system is configured single-pole or 3-pole and a bit signifying whether or not the targets should
be loaded or ignored. The Display Controller will send the initialization message to the Single-Pole chassis at 750ms intervals
until it receives a message from the 93B SV rescinding the Single-Pole chassis alarm. If the Single-Pole chassis is not in the
system the Supervisor will not have transmitted the alarm message in the first place and only one initialization message will
be sent.
Once the Single-Pole logic has been initialized, it will begin transmitting a 16-bit status word to the Supervisor at 264ms in-
tervals. The transmission will be asynchronous with a start bit (active low), 16 data bits and one stop bit (active high) The
message bits will be synchronized to the system clock and will be in the mark, or logic 1 condition when no messages are
being transmitted. SV_DAT will be utilized to transmit the message. The first time that the Supervisor detects one of these
messages and determines that it is valid it will transmit a message to the Display Controller rescinding the single-pole alarm.
When the Display Controller receives this message it will cease sending the initialization message to the Single-Pole chassis.
Normal Operation after Initialization is Complete
The single-pole logic will continue to transmit its 16-bit status message to the Supervisor at 264ms intervals.
The Supervisor will not accept any status changes as valid until it receives two identical messages in succes-
sion. If a status single-pole logic Logic to the Display Controller. As long as there are no changes in single-pole
logic status detected by the Supervisor, byte 2 of every 10th status message (2.64 second interval) will be
transmitted to the Display Controller. This is to insure that the Display Controller will not miss a change in single-
pole logic status.
When the Display Controller receives this message it will be saved in NV RAM. If the trip release code received
from the Supervisor differs from the latest code known to the Display Controller, or if a new trip release code is
programmed by the operator, the initialization message will be transmitted to the Single-Pole chassis with bit 7 =
logic 1. This will signal the single-pole logic to ignore the target and mode bits but to accept the Trip Release
code.
If the Supervisor has gone 600 ms without receiving a status message, or if it detects that the single-pole
jumper position on the Supervisor card has changed, it will declare a SINGLE-POLE CHASSIS ALARM locally
and transmit the alarm message to the Display Controller. As long as this alarm remains active the Display
Controller will transmit the initialization message with bit 7 = logic 0, at 750ms intervals.
RFL 9300 RFL Electronics Inc.
August 9, 2001 9 - 5 (973) 334-3100
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