JUMPERS
J2 A position is for normal operation. (phase locked loop is enabled)
B position is used for factory testing. (phase locked loop is disabled)
J3 Selects 56kbps or 64kbps data rate
J5 Selects Loop or Normal operation. When set to Loop, the receiver clock is looped back out to
the transmitter as shown in Figure 23-3.
POTENTIOMETERS
R2 Used to adjust the G.703 output voltage level. Factory adjustment only.
R9 Used to adjust the phase locked loop. Factory adjustment only.
TEST POINTS
TP1 3.584 mHz clock
TP2 Signal ground
TP3 Used for factory testing only
23.3 THEORY OF OPERATION
23.3.1 SYSTEM OVERVIEW
The 93 G.703 creates a full duplex 64kbps serial link to a remote 93 G.703 module. The 9300 is considered
Data Terminal Equipment (DTE). The 93 G.703 plugs into the back of the 9300 and does not require a card to
be plugged into the front of the chassis since all logic is contained on the rear board. The G.703 protocol is a
pulsed AMI 2 wire TX pair and an AMI 2 wire RX pair. The polarity of the pulses are constantly toggled, there-
fore, the DC component is a zero. Since there is no DC component, isolation transformers can be present in
both the RX and TX ports. If the AMI pulses are at 128 kHz, the digital signal is a 0 and if it is at 64 kHz then the
digital signal is a 1. The receiver contains an analog phase locked loop to recover the remote TX clock and cre-
ate the local RX clock. The transmitter output can get the transmitter clock timing from any one of the following
three sources: from a local crystal oscillator, from the incoming receiver clock or from an adjacent 93 G.703
module.
The 93 G.703 module can be used in any of the three 9300 configurations. These include two terminal, two ter-
minal with hot standby and three terminal. Hot standby and three terminal operation require that both transmit-
ter clocks are locked together. In the case of hot standby, there is only one CC card to shift out transmitter data
to both 93 G.703 modules. In the case of three terminal, the transmitter clocks should also be locked together to
keep the clocks from walking on the back plane and potentially interfering with each other. For this reason, the
93 G.703 card plugged in the first card slot will present the TX clock to the 93 G.703 in the second position. In
hardware (in the Actel), the second 93 G.703 will see the adjacent card clock transitions and use this clock
source for transmitter timing. This is done automatically by the hardware and does not require any software or
jumper settings from the supervisor card. The transmitter timing is recovered inside the Actel chip with a digital
phase locked loop. The reference input comes from the adjacent 93 G.703 card. If the receiver clock is looped
back out of the transmitter, the local oscillator and the adjacent TX clock reference are not used. This option is
the most likely configuration to be used in the field.
In most cases an interposing piece of communication equipment (DCE) will send and receive the data and tim-
ing over a communication path to the remote terminal. The DCE then becomes a clock source to both the re-
mote and local terminals. The DCE equipment will be the source of both the transmitter and receiver clocks.
This is accomplished in the 93 G.703 by looping the receiver clock back out to the transmitter. For in-house
testing or for relays connected over metallic pairs, the local Tx oscillator is the best choice since the DCE inter-
face does not exist. A jumper on the 93 G.703 module allows the RX clock to be looped out of the TX port.
RFL 9300 RFL Electronics Inc.
February 7, 2000 23 - 3 (973) 334-3100
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