RFL 9300 RFL Electronics Inc.
February 7, 2000 13 - 9 (973) 334-3100
To read the data latched into U7, U18 executes a read operation at address A400H. This causes U24-14 to go
low, enabling U7's output pins. The data is then latched into U17 by the low-going READ strobe issued from the
microcontroller during the read operation. The received data is now present on port 0 of U18 and read in.
13.3.2.4 READ AND WRITE CIRCUITS FOR RFL 93B SV SUPERVISOR CONTROLLER
Reading and writing over the eight-line bus between the RFL 93B CC and RFL 93B SV modules uses octal
transceiver U27, octal buffer U28, quad buffer/line driver U29, and programmable logic array (PAL) U24; octal
latch U17 is only used during READ operations. When the /COMM EN line from the RFL 93B SV supervisor
goes low on edge connector terminal P1-A14, U10-6 goes low, feeding U18-27. This low-going signal causes
an interrupt within U18 that starts the supervisor read/write routine ("SUPER:"). The /COMM EN interrupt should
take place every 500 ms if the supervisor is functioning properly. U28-1 and U27-19 will unconditionally be high
if the /COMM EN line is high; this disables U27 and U28, blocking any possible contention on the supervisor
bus.
During a WRITE sequence with the supervisor, U28-16 drives the /CS line low; the data to be written is then
present out microcontroller port 1. U18 then performs a WRITE operation to address 6200H; this causes U24-
13 to go low. The write strobe line into U28 (U28-15) goes low, then high. The write protocol causes three write
operations in a row: address, data, and security byte.
During a READ sequence with the supervisor, the /CS line is driven low by U28-16. Then, U18 performs a read
operation from address A200H, causing U24-13 to go low. This is followed by a read strobe signal that goes low
into U28-13 and latches the data read into U17. U18 then reads the data present on port 0. The read protocol
initiates three read operations in a row: address, data, and security byte.
13.3.2.5 READ AND WRITE CIRCUITS FOR RFL 93B MO MODEM MODULE
Reading and writing over the eight-bit bus connecting the RFL 93B CC module and the RFL 93B MO module
uses octal transceiver U25, octal buffer/line driver U26, and programmable logic array (PAL) U24; octal latch
U17 is used during read operations. The address is sent over the bus first, followed by the data. When U6-16 is
high, the data out of U25 is the address or reset command for the RFL 93B MO module. During a write se-
quence, the address of the register in the modem that will accept the data is outputted on U18 port 1. A write
operation is executed at address 6020H; this forces U6-16 high and U24-12 low, enabling U25 and U26. This is
followed by a write strobe (/WR) issued from the microcontroller on U26-18.
Next, the data to be written to the RFL 93B MO module is presented on port 1, and a write operation is executed
at address 6000H. This causes U24-12 to go low, enabling U25 and U26. A write strobe will occur while U6-16
is low, loading the data through U25 into the RFL 93B MO module.
During a read sequence from the RFL 93B MO module, the address to be read from is first written to the RFL
93B MO module as described above. Next, the microcontroller executes a read operation by reading memory at
address location A000H. This forces U24-12 low, enabling U25 and U26. The /RD read strobe is then outputted
to edge connector terminal P1-A30 through U26-17.
U25 is a bi-directional transceiver that receives from "B to A" if U25-1 is low. The data is then latched into U17
and present on port 0. The microcontroller then reads the data from the RFL 93B MO module on port 0.
13.3.2.6 ADDRESS DECODER
Address decoder U24 is a programmed logic device that provides a decoder for external bus reads, a wait-state
signal for microcontroller U18, and latched outputs for the alarm and hot standby lines. U24's inputs are micro-
controller address bus A15 through A8, and the /READ and /WRITE strobe lines. A logic diagram for U24 ap-
pears in Figure 13-6.
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