RFL 9300 RFL Electronics Inc.
May 1, 1998 14 - 4 (973) 334-3100
Reset, Address Latch Circuits, And Control Selector. Control bytes are read out of and written into the RFL 93B
MO's interface memory by the RFL 93B CC module. The first step for reading or writing to a specific interface
memory register is to send the interface memory address. The address on lines D6 through D0 is latched into U9
whenever line A5 is high and the /WR line is strobed. D7 is also latched into U9; this line is used to give a hardware
reset to the modem. During normal addressing, this line is sent high to disable resetting. After the address has
been latched into U9, the next step would be a read or a write operation from the interface memory. Lines D7
through D0 are also used as the data bus; line A5 is held low while the RD or /WR strobe occurs.
Since there can be two modem modules in a system, input lines SEL0 and SEL1 select which RFL 93B MO module
is being accessed. The SEL0 line must be low and the SEL1 line must be high to enable (U5-10) the /WR and RD
(U8, U7) strobe lines from reaching the modem interface memory.
Jumpers J2 and J3 determine the polarity of the RD strobe. For devices requiring an RD strobe, a zero-ohm resis-
tor is placed in the J2 position. If this resistor is moved to the J3 position, an /RD strobe is produced.
Voltage Regulator Circuits. The power supply for the RFL 9300 system produces +15-volt outputs, and the mo-
dem on the RFL 93B MO requires +
12 Vdc. U10, R9, and R10 form an equivalent 3-volt precision Zener. The volt-
age between the anode and the gate of shunt regulator U10 is set at 2.5 volts by U10's internal gap band refer-
ence. A divider formed by R9 and R10 results in a fixed 3-volt drop across the cathode and anode of U10. Since
this is in series with the +15-volt regulated input from the system power supply, the voltage at the anode of U10 is a
regulated +12 volts. A similar circuit is used to reduce the -15-volt system power supply input to -12 volts. This cir-
cuit consists of U11, R11, and R12.
Test points TP2 and TP3 monitor the regulator outputs. When the circuits are functioning properly, the voltage at
TP2 should be between +11.4 volts and +12.6 volts, and the voltage at TP3 should be between -11.4 volts and -
12.6 volts.
RS-422, Serial Clock, And Data Multiplexer Circuits. Several different system configurations are supported by
the RFL 93B MO module. The most typical configuration would be a single RFL 93B MO module and a single RFL
93B CC module. However, a system using the hot standby feature or one being used in a three-terminal application
would contain two RFL 93B MO modules.
In hot standby, when one modem loses communication, the other modem is switched in and the system continues
to function over the alternate modem. In this configuration, both modems send the same transmitted data from the
RFL 93B CC module, and the RFL 93B CC module selects which modem it receives clocks and data from.
In the normal configuration (one RFL 93B CC module and one RFL 93B MO module), the TX control line is high
and the STANDBY line is low. The TX control line is fixed by a pull-up resistor (RZ1-10) and the STANDBY control
line comes from the RFL 93B CC module. The SELECT line on U2-1 is always low, so the data and clock from the
"on-board" modem is sent to the RFL 93B CC module. The path for this is from the "on-board" modem into U2's "A"
inputs. U2's "Y" outputs are then fed to RS-422 interface U1. U1 controls serial communication with the RFL 93B
CC module. The TX control line is always high and the TX data always comes from the RFL 93B CC module in Slot
1. The TX data comes from the RFL 93B CC module at the TX DATA A and TX DATA B inputs (edge connector
terminals P1-A10 and P1-C10). U3 converts the balanced RS-422 inputs into unbalanced 5-volt logic at U3-3. The
unbalanced 5-volt logic TX DATA is looped out the X TX DATA line (edge connector terminal P1-C22) and back in
again at the X TX DATA line input (edge connector terminal P1-A22). This looped connection is on the chassis
motherboard. This external connection allows the same hardware to be used in a number of different configura-
tions.
In the hot standby configuration (one RFL 93B CC module and two RFL 93B MO modules), the TX control line is
high for both RFL 93B MO modules. This places the same transmit data in both RFL 93B MO modules; the source
is the RFL 93B CC module in Slot 1. The X TX DATA on from the modem in Slot 1 (edge connector terminal P1-
C22) is fed through the motherboard to edge connector terminal P1-A22 on both modem modules. The STANDBY
line on edge connector terminal P1-A15 is controlled by the RFL 93B CC module. If the line is high, the RFL 93B
MO module in Slot 2 is selected and the X data and clocks on edge connector terminals P1-C18, P1-C19, and P1-
C21 are fed into U2's "B" inputs. The STANDBY input is connected to U2-1, and feeds the "off board modem" data
and clocks onto the U2's "Y" outputs.
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