24.4.3 RESET
If there are no SINGLE-POLE CHASSIS ALARMS, once the power-up interval is completed, the only time that
the Display Controller will transmit the initialization message with bit 7 = logic 0 is when a reset signal is issued.
In that case the message will be transmitted to the single-pole logic with all target bits set at logic 0.
The RESET switch on the front of the Display Assembly serves a dual purpose. When it is pressed, and there
are no active trip signals, all LED status indicators on both the Display and Single-Pole Assemblies will be reset
after a 3-second LED test. After the LED test is completed, the remaining modules, except for the comms cards
in the RFL 9300, will execute a 3-second LED test. If there are any active trip signals on the main chassis a
“TRIP ACTIVE” message will appear on the display and the reset signal will have no effect. Even if there are
active trip signals detected on the main chassis the reset signal will still be transmitted to the single-pole logic
where LED status indicators will be reset only on phases without active trip signals. The RESET switch is also
used to reset any alarms generated by the Display Controller. Alarms transmitted to the Display Controller by
the RFL 93B SV and the single-pole logic will not be reset when the RESET switch is pressed. These alarms
will only be reset when the alarm condition itself disappears. When the single-pole logic is configured for three-
pole trip, the reset signal is ignored if there is an active trip on any phase. This differs from the single-pole case
where the reset signal is processed on a phase-by-phase basis.
24.4.4 SERIAL COMMUNICATIONS LINK WITH THE SUPERVISOR
The single-pole logic utilizes the SV_DAT (JP1-23), SP_DETECT (JP1-25) and SP_CHASSIS (JP1-26) signal
lines to interface with the Supervisor. Messages from the Single-Pole chassis are transmitted on the SV_DAT
output. SP_DETECT is used by the Supervisor to detect the presence or absence of the Single-Pole chassis. A
low signal on this line indicates that the Single-Pole chassis is connected to the RFL 9300. In order for single-
pole trip to be active, SNGPOLE (U1-2) on the 93B SV card, must be a logic low. This can only happen when
jumper J5 on the 93B SV card is in the single-pole position (G), and the Single-Pole chassis is connected to the
RFL 9300 via a ribbon cable which in turn connects SP_CHASSIS to ground. If the 93B SV detects that any of
these connections have changed since the interface with the Single-Pole chassis was initialized it will declare a
SINGLE-POLE CHASSIS ALARM locally (#54) and transmit the alarm message to the Display Controller. If the
Single-Pole chassis is connected to the RFL 9300 but jumper J5 is in the H position, the Single-Pole chassis is
said to be in three-pole mode. In this mode none of the single-pole trip algorithms apply and the RFL 9300 op-
erates as a normal two-terminal or three-terminal relay with six additional output trip contacts per phase.
24.4.5 SINGLE-POLE TRIP ALGORITHMS
Open Breaker - When the RFL 9300 is configured for single-pole operation the open breaker condition is deter-
mined on a phase-by-phase basis. Any Phase Controller sending a ZTC signal to the RFL 93B SV will wait to
declare its’ breaker to be open until the RFL 93B SV returns the open breaker signal.
Reclose Block - The RFL 93B SV monitors all trip signals originating at both the local and remote terminals.. If
the RFL 9300 is configured for single-pole trip operation and a trip signal is detected, a 3-second timer is
started. If trip signals, originating either at the local or remote terminals, are detected on the remaining two
phases before the 3-second timer expires the reclose block output relay will be energized for 50ms.
Selective Pole Relaying - If Selective Pole Relaying is not enabled and multiphase trips are calculated locally, all
three single-pole breakers will be tripped and a reclose block output signal will be issued. If Selective Pole Re-
laying is enabled and multiphase trips are calculated locally, only the breakers on the faulted phases will be
tripped. A reclose block output signal will be issued only when a three-phase trip is detected within the required
3-second time window.
RFL 9300 RFL Electronics Inc.
August 25, 2000 24 - 10 (973) 334-3100
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