UM0306 Backup registers (BKP)
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9 Backup registers (BKP)
9.1 Introduction
The backup registers are ten 16-bit registers for storing 20 bytes of user application data.
They are implemented in the backup domain that remains powered on by V
BAT
when the
V
DD
power is switched off. They are not reset when the device wakes up from STANDBY
mode or by a system reset or power reset.
In addition, the BKP control registers are used to manage the Tamper detection feature and
RTC calibration.
After reset, the access to Backup registers and RTC is disabled and the Backup domain is
protected against possible parasitic write access.
The DBP bit must be set in the Power control register (PWR_CR) to enable access to the
Backup registers and RTC.
9.2 Features
● Ten 16-bit data registers.
● Status/control register for managing the anti-Tamper feature
● Calibration register for storing the RTC calibration value
9.3 Tamper detection
The ANTI_TAMP pin generates a Tamper detection event when the pin changes from 0 to 1
or from 1 to 0 depending on the TPAL bit in the Backup control register (BKP_CR). A tamper
detection event resets all data backup registers.
However to avoid losing Tamper events, the signal used for edge detection is logically
ANDed with the Tamper enable in order to detect a Tamper event in case it occurs before
the Tamper pin is enabled.
● When TPAL=0: If the Tamper pin is already high before it is enabled (by setting TPE
bit), an extra Tamper event is detected as soon as the Tamper pin is enabled (while
there was no rising edge on the Tamper pin after TPE was set)
● When TPAL=1: If the Tamper pin is already low before it is enabled (by setting the TPE
bit), an extra Tamper event is detected as soon as the Tamper pin is enabled (while
there was no falling edge on the Tamper pin after TPE was set)
After a Tamper event has been detected and cleared, the Tamper pin should be disabled
and then re-enabled with TPE before writing to the backup data registers (BKP_DRx) again.
This prevents software from writing to the backup data registers (BKP_DRx), while the
Tamper pin value still indicates a Tamper detection. This is equivalent to a level detection on
the Tamper pin.
Note: Tamper detection is still active when VDD power is switched off. To avoid unwanted resetting
of the data backup registers, the ANTI_TAMP pin should be externally tied to the correct
level.
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