UM0306 General purpose and alternate function I/O (GPIO and AFIO)
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5.2.4 Port output data register (GPIOx_ODR) (x=A..E)
Address Offset: 0Ch
Reset value: 0000 0000h
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
1514131211109876543210
ODR15 ODR14 ODR13 ODR12 ODR11 ODR10 ODR9 ODR8 ODR7 ODR6 ODR5 ODR4 ODR3 ODR2 ODR1 ODR0
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:16 Reserved, always read as 0.
Bits 15:0
ODRx[15:0]: Port output data (x= 0 .. 15)
These bits can be read and written by software and can be accessed in Word
mode only.
Note: For atomic bit set/reset, the ODR bits can be individually set and reset by
writing to the GPIOx_BSRR register (x = A .. E).
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