UM0306 General purpose timer (TIMx)
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PWM edge-aligned mode
Up-counting configuration
Up-counting is active when the DIR bit in the TIMx_CR1 register is low. Refer to the
Section : Up-counting mode on page 224.
In the following example, we consider PWM mode 1. The reference PWM signal OCxREF is
high as long as TIMx_CNT <TIMx_CCRx else it becomes low. If the compare value in
TIMx_CCRx is greater than the auto-reload value (in TIMx_ARR) then OCxREF is held at
‘1’. If the compare value is 0 then OCxREF is held at ‘0’. Figure 102 shows some edge-
aligned PWM waveforms in an example where TIMx_ARR=8.
Figure 102. Edge-aligned PWM waveforms (ARR=8)
Down-counting configuration
Down-counting is active when DIR bit in TIMx_CR1 register is high. Refer to Down-counting
mode on page 227
In PWM mode 1, the reference signal ocxref is low as long as TIMx_CNT>TIMx_CCRx else
it becomes high. If the compare value in TIMx_CCRx is greater than the auto-reload value in
TIMx_ARR, then ocxref is held at ‘1’. 0% PWM is not possible in this mode.
PWM center-aligned mode
Center-aligned mode is active when the CMS bits in TIMx_CR1 register are different from
‘00’ (all the remaining configurations having the same effect on the ocxref/OCx signals). The
compare flag is set when the counter counts up, when it counts down or both when it counts
up and down depending on the CMS bits configuration. The direction bit (DIR) in the
TIMx_CR1 register is updated by hardware and must not be changed by software. Refer to
the Center-aligned mode (up/down counting) on page 229.
Figure 103 shows some center-aligned PWM waveforms in an example where:
● TIMx_ARR=8,
● PWM mode is the PWM mode 1,
● The flag is set when the counter counts down corresponding to the center-aligned
mode 1 selected for CMS=01 in TIMx_CR1 register.
COUNTER REGISTER
‘1’
0
1234567801
‘0’
ocxref
CCxIF
ocxref
CCxIF
ocxref
CCxIF
ocxref
CCxIF
CCRx=4
CCRx=8
CCRx>8
CCRx=0
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