Debug support (DBG) UM0306
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20.16.10 Example of configuration
● Set the bit TRCENA in the Debug Exception and Monitor Control Register (DEMCR)
● Write the TPIU Current Port Size Register to the desired value (default is 0x1 for a 1-bit
port size)
● Write TPIU Formatter and Flush Control Register to 0x102 (default value)
● Write the TPIU Select Pin Protocol to select the sync or async mode. Example: 0x2 for
async NRZ mode (UART like)
● Write the DBGMCU Control Register to 0x20 (bit IO_TRACEN) to assign TRACE I/Os
for async mode. A TPIU Sync packet is emitted at this time (FF_FF_FF_7F)
● Configure the ITM and write the ITM Stimulus register to output a value
Table 78. Important TPIU registers
Address Register Description
0xE0040004 Current Port Size
Allows the trace port size to be selected:
Bit 0: Port size = 1
Bit 1: Port size = 2
Bit 2: Port Size = 3
Bit 3: Port Size = 4
Only 1 bit must be set. By default, the port size is one bit
(0x00000001)
0xE00400F0
Selected Pin
Protocol
Allows the Trace Port Protocol to be selected:
Bit1:0=
00: Sync Trace Port Mode
01: Serial Wire Output - manchester (default value)
10: Serial Wire Output - NRZ
11: reserved
0xE0040304
Formatter and
Flush Control
Bit 31-9 = always ‘0’
Bit 8 = TrigIn = always ‘1’ to indicate that triggers are indicated
Bit 7-4 = always 0
Bit 3-2 = always 0
Bit 1 = EnFCont. In Sync Trace mode (Select_Pin_Protocol
register bit1:0=00), this bit is forced to ‘1’: the formatter is
automatically enabled in continuous mode. In asynchronous
mode (Select_Pin_Protocol register bit1:0 <> 00), this bit can
be written to activate or not the formatter.
Bit 0 = always 0
The resulting default value is 0x102
Note: In synchronous mode, because the TRACECTL pin is not
mapped outside the chip, the formatter is always enabled in
continuous mode -this way the formatter inserts some control
packets to identify the source of the trace packets).
0xE0040300
Formatter and
Flush Status
Not used in Cortex-M3, always read as 0x00000008
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