UM0306 Advanced control timer (TIM1)
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‘1’. If the compare value is 0 then OCxRef is held at ‘0’. Figure 56 shows some edge-aligned
PWM waveforms in an example where TIM1_ARR=8.
Figure 56. Edge-aligned PWM waveforms (ARR=8)
Down-counting configuration
Down-counting is active when DIR bit in TIM1_CR1 register is high. Refer to the Down-
counting mode on page 157
In PWM mode 1, the reference signal OCxRef is low as long as TIM1_CNT>TIM1_CCRx
else it becomes high. If the compare value in TIM1_CCRx is greater than the auto-reload
value in TIM1_ARR, then OCxREF is held at ‘1’. 0% PWM is not possible in this mode.
PWM center-aligned mode
Center-aligned mode is active when the CMS bits in TIM1_CR1 register are different from
‘00’ (all the remaining configurations having the same effect on the OCxRef/OCx signals).
The compare flag is set when the counter counts up, when it counts down or both when it
counts up and down depending on the CMS bits configuration. The direction bit (DIR) in the
TIM1_CR1 register is updated by hardware and must not be changed by software. Refer to
the Center-aligned mode (up/down counting) on page 159.
Figure 57 shows some center-aligned PWM waveforms in an example where:
● TIM1_ARR=8,
● PWM mode is the PWM mode 1,
● The flag is set when the counter counts down corresponding to the center-aligned
mode 1 selected for CMS=01 in TIM1_CR1 register.
COUNTER REGISTER
‘1’
0
1234567801
‘0’
ocxref
CCxIF
ocxref
CCxIF
ocxref
CCxIF
ocxref
CCxIF
CCRx=4
CCRx=8
CCRx>8
CCRx=0
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