UM0306 Power control (PWR)
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Figure 4. Power On Reset/Power Down Reset waveform
3.2.2 Programmable voltage detector (PVD)
You can use the PVD to monitor the V
DD
power supply by comparing it to a threshold
selected by the PLS[2:0] bits in the Power control register (PWR_CR).
The PVD is enabled by setting the PVDE bit.
A PVDO flag is available, in the Power control/status register (PWR_CSR), to indicate if V
DD
is higher or lower than the PVD threshold. This event is internally connected to the EXTI
line16 and can generate an interrupt if enabled through the EXTI registers. The PVD output
interrupt can be generated when V
DD
drops below the PVD threshold and/or when V
DD
rises above the PVD threshold depending on EXTI line16 rising/falling edge configuration.
As an example the service routine could perform emergency shutdown tasks.
Figure 5. PVD thresholds
V
DD
Reset
40 mV
hysteresis
POR
PDR
Temporization
t
RSTTEMPO
V
DD
PVD Output
100 mV
hysteresis
PVD Threshold
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