Power control (PWR) UM0306
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Refer to Ta bl e 8 for more details on how to exit STANDBY mode.
I/O states in STANDBY mode
In STANDBY mode, all I/O pins are high impedance except:
● Reset pad (still available)
● Anti-tamper pin if configured for tamper or calibration out
● WKUP pin, if enabled
Debug mode
The debug connection is lost if the application puts the MCU in STOP or STANDBY mode
while the debug features are used. This is due to the fact that the Cortex-M3 core is no
longer clocked.
However, the STM32F10x/ST32M103xx integrate special capabilities that allow the user to
perform software debugging in low-power modes. For more details, refer to section
Section 20.15.1: Debug support for low-power modes.
3.3.6 Auto-Wake-Up (AWU) from low-power mode
The RTC can be used to wake-up the MCU from low-power mode without depending on an
external interrupt (Auto-Wake-Up mode). The RTC provides a programmable time base for
waking-up from STOP or STANDBY mode at regular intervals. For this purpose, two of the
three alternative RTC clock sources can be selected by programming the RTCSEL[1:0] bits
in the Backup domain control register (RCC_BDCR):
● Low-power 32.768 kHz external crystal oscillator (LSE OSC).
This clock source provides a precise time base with very low-power consumption (less
than 1µA added consumption in typical conditions)
● Low-power internal RC Oscillator (LSI RC)
This clock source has the advantage of saving the cost of the 32.768 kHz crystal. This
internal RC Oscillator is designed to add minimum power consumption.
To wake-up from STOP mode with an RTC alarm event, it is necessary to:
● Configure the EXTI Line 17 to be sensitive to rising edge
● Configure the RTC to generate the RTC alarm
To wake-up from STANDBY mode, there is no need to configure the EXTI Line 17.
Table 8. STANDBY mode
Mode Entry
WFI (Wait for Interrupt) or WFE (Wait for Event) while:
– Set SLEEPDEEP in Cortex-M3 System Control register
– Set PDDS bit in Power Control register (PWR_CR)
– Clear WUF bit in Power Control/Status register (PWR_CSR)
Mode Exit
WKUP pin rising edge, RTC alarm, external Reset in NRST pin, IWDG
Reset.
Wake-up latency Regulator start up. Reset phase
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