General purpose and alternate function I/O (GPIO and AFIO) UM0306
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5.3.4 Timer alternate function remapping
Timer 4 channels 1 to 4 can be remapped from Port B to Port D.
Other timer remapping possibilities are listed in Tabl e 17 to Table 1 9.
Refer to AF remap and debug I/O configuration register (AFIO_MAPR)
Table 15. Debug port mapping
SWJ
_CFG
[2:0]
Available Debug Ports
SWJ I/O pin assigned
PA.13 /
JTMS/
SWDIO
PA.14 /
JTCK/S
WCLK
PA.15 /
JTDI
PB.3 /
JTDO/
TRACE
SWO
PB.4/
JNTRST
000
Full SWJ (JTAG-DP + SW-DP)
(Reset state)
XXX X X
001
Full SWJ (JTAG-DP + SW-DP)
but without JNTRST
XXX xfree
010
JTAG-DP Disabled and
SW-DP Enabled
X X free free
(1)
1. Released only if not using asynchronous trace.
free
100
JTAG-DP Disabled and
SW-DP Disabled
free free free free free
Other Forbidden
Table 16. Timer 4 alternate function remapping
Alternate Function TIM4_REMAP = 0 TIM4_REMAP = 1
TIM4_CH1 PB6 PD12
TIM4_CH2 PB7 PD13
TIM4_CH3 PB8
(1)
PD14
TIM4_CH4 PB9
(1)
PD15
Table 17. Timer 3 alternate function remapping
Alternate Function
TIM3_REMAP[1:0] =
“00” (no remap)
TIM3_REMAP[1:0] =
“10” (partial remap)
TIM3_REMAP[1:0] =
“11” (full remap)
(1)
1. Remap available only for 64 and 100 pin packages.
TIM3_CH1 PA6 PB4 PC6
TIM3_CH2 PA7 PB5 PC7
TIM3_CH3 PB0 PC8
TIM3_CH4 PB1 PC9
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