UM0306 Controller area network (bxCAN)
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Mailbox data length control and time stamp register (CAN_TDTxR) (x=0..2)
All bits of this register are write protected when the mailbox is not in empty state.
Address Offsets: 184h, 194h, 1A4h
Reset Value: xxh
Mailbox data low register (CAN_TDLxR) (x=0..2)
All bits of this register are write protected when the mailbox is not in empty state.
Bit 1
RTR: Remote Transmission Request
0: Data frame
1: Remote frame
Bit 0
TXRQ: Transmit Mailbox Request
Set by software to request the transmission for the corresponding mailbox.
Cleared by hardware when the mailbox becomes empty.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
TIME[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
Reserved TGT Reserved DLC[3:0]
rw rw rw rw rw
Bits 31:16
TIME[15:0]: Message Time Stamp
This field contains the 16-bit timer value captured at the SOF transmission.
Bits 15:9 Reserved
Bit 8
TGT: Transmit Global Time
This bit is active only when the hardware is in the Time Trigger Communication
mode, TTCM bit of the CAN_MCR register is set.
0: Time stamp TIME[15:0] is not sent.
1: Time stamp TIME[15:0] value is sent in the last two data bytes of the 8-byte
message: TIME[7:0] in data byte 6 and TIME[15:8] in data byte 7, replacing the
data written in CAN_TDHxR[31:16] register (DATA6[7:0] and DATA7[7:0]). DLC
must be programmed as 8 in order these two bytes to be sent over the CAN bus.
Bits 7:4 Reserved
Bits 3:0
DLC[3:0]: Data Length Code
This field defines the number of data bytes a data frame contains or a remote
frame request.
A message can contain from 0 to 8 data bytes, depending on the value in the DLC
field.
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