UM0306 Analog/digital converter (ADC)
481/519
19.13.9 ADC regular sequence register 1 (ADC_SQR1)
Address offset: 2Ch
Reset value: 0000 0000h
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved L[3:0] SQ16[4:1]
1514131211109876543210
SQ16_
0
SQ15[4:0] SQ14[4:0] SQ13[4:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:24 Reserved, must be kept cleared.
Bits 23:20
L[3:0]: Regular channel sequence length
These bits are written by software to define the total number of conversions in
the regular channel conversion sequence.
0000: 1 conversion
0001: 2 conversions
.....
1111: 16 conversions
Bits 19:15
SQ16[4:0]: 16th conversion in regular sequence
These bits are written by software with the channel number (0..17) assigned
as the 16th in the conversion sequence.
Bits 14:10 SQ15[4:0]: 15th conversion in regular sequence
Bits 9:5 SQ14[4:0]: 14th conversion in regular sequence
Bits 4:0 SQ13[4:0]: 13th conversion in regular sequence
To Next Page
Loading...
Need help?
General
