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ST STM32F10 Series - Page 63

ST STM32F10 Series
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UM0306 Reset and clock control (RCC)
63/519
Bits 20:19 Reserved, always read as 0.
Bit 18
USART3RST USART 3 reset
Set and reset by software.
0: No effect
1: Reset USART 3
Bit 17
USART2RST USART 2 reset
Set and reset by software.
0: No effect
1: Reset USART 2
Bits 16:15 Reserved, always read as 0.
Bit 14
SPI2RST SPI 2 reset
Set and reset by software.
0: No effect
1: Reset SPI 2
Bits 13:12 Reserved, always read as 0.
Bit 11
WWDGRST Window Watchdog reset
Set and reset by software.
0: No effect
1: Reset window watchdog
Bits 10:3 Reserved, always read as 0.
Bit 2
TIM4RST Timer 4 reset
Set and reset by software.
0: No effect
1: Reset timer 4
Bit 1
TIM3RST Timer 3 reset
Set and reset by software.
0: No effect
1: Reset timer 3
Bit 0
TIM2RST Timer 2 reset
Set and reset by software.
0: No effect
1: Reset timer 2
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