Datasheet 103
PCH Pin States
System Management Interface
SML0ALERT#/
GPIO60
Suspend High-Z High-Z Defined Defined Defined Defined
SML0DATA Suspend High-Z High-Z Defined Defined Defined Defined
SML0CLK Suspend High-Z High-Z Defined Defined Defined Defined
SML1CLK/GPIO58 Suspend High-Z High-Z Defined Defined Defined Defined
SML1ALERT#/
PCHHOT#/GPIO74
Suspend High-Z High-Z Defined Defined Defined Defined
SML1DATA/GPIO75 Suspend High-Z High-Z Defined Defined Defined Defined
Miscellaneous Signals
SPKR
7
Core Low Low Defined Defined Off Off
JTAG_TDO Suspend High-Z High-Z High-Z High-Z High-Z High-Z
Clocking Signals
CLKOUT_ITPXDP_P,
CLKOUT_ITPXDP_N
Core Running Running Running Running Off Off
CLKOUT_DP_P,
CLKOUT_DP_N
Core Running Running Running Running Off Off
CLKOUT_DMI_P,
CLKOUT_DMI_N
Core Running Running Running Running Off Off
XTAL25_OUT Core High-Z High-Z High-Z High-Z Off Off
XCLK_RCOMP Core High-Z High-Z High-Z High-Z Off Off
CLKOUT_PEG_A_P,
CLKOUT_PEG_A_N
Core Running Running Running Running Off Off
CLKOUT_PEG_B_P,
CLKOUT_PEG_B_N
Core Running Running Running Running Off Off
CLKOUT_PCIE[7:0] P,
CLKOUT_PCIE[7:0] N
Core Running Running Running Running Off Off
CLKOUT_PCI[4:0] Core Running Running Running Running Off Off
CLKOUTFLEX[3:0]/
GPIO[67:64]
Core Low Running
Running/
Low
Running Off Off
Intel
®
High Definition Audio Interface
HDA_RST# Suspend Low Low
3
Defined Defined Low Low
HDA_SDO
7
Suspend Low Low Low Low Low Low
HDA_SYNC
7
Suspend Low Low Low Low Low Low
HDA_BCLK
22
Suspend Low Low Low Low Low Low
HDA_DOCK_EN#/
GPIO33
Core High High
11
High
11
High
11
Off Off
HDA_DOCK_RST#/
GPIO13
Suspend High-Z High-Z High-Z High-Z High-Z High-Z
Table 3-3. Power Plane and States for Output and I/O Signals for Mobile Configurations
(Sheet 3 of 6)
Signal Name
Power
Plane
During
Reset
1
Immediately
after Reset
1
C-x
states
S0/S1 S3 S4/S5
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