Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - Page 784

PCI Express* Configuration Registers
784 Datasheet
19.1.41 MA—Message Signaled Interrupt Message Address
Register (PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)
Address Offset: 84h–87h Attribute: R/W
Default Value: 00000000h Size: 32 bits
19.1.42 MD—Message Signaled Interrupt Message Data Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)
Address Offset: 88h–89h Attribute: R/W
Default Value: 0000h Size: 16 bits
19.1.43 SVCAP—Subsystem Vendor Capability Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)
Address Offset: 90h–91h Attribute: RO
Default Value: A00Dh Size: 16 bits
19.1.44 SVID—Subsystem Vendor Identification Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)
Address Offset: 94h–97h Attribute: R/WO
Default Value: 00000000h Size: 32 bits
Bit Description
31:2
Address (ADDR) — R/W. Lower 32 bits of the system specified message address,
always DW aligned.
1:0 Reserved
Bit Description
15:0
Data (DATA) — R/W. This 16-bit field is programmed by system software if MSI is
enabled. Its content is driven onto the lower word (PCI AD[15:0]) during the data
phase of the MSI memory write transaction.
Bit Description
15:8 Next Capability (NEXT) — RO. Indicates the location of the next pointer in the list.
7:0
Capability Identifier (CID) — RO. Value of 0Dh indicates this is a PCI bridge
subsystem vendor capability.
Bit Description
31:16
Subsystem Identifier (SID) — R/WO. Indicates the subsystem as identified by the
vendor. This field is write once and is locked down until a bridge reset occurs (not the
PCI bus reset).
15:0
Subsystem Vendor Identifier (SVID) — R/WO. Indicates the manufacturer of the
subsystem. This field is write once and is locked down until a bridge reset occurs (not
the PCI bus reset).