Datasheet 837
Serial Peripheral Interface (SPI)
21.4.6 FRAP—Flash Regions Access Permissions Register
(GbE LAN Memory Mapped Configuration Registers)
Memory Address: MBARB + 50h Attribute: RO, R/W
Default Value: 00000808h Size: 32 bits
Bit Description
31:28 Reserved
27:25
GbE Master Write Access Grant (GMWAG) — R/W. Each bit 27:25 corresponds to
Master[3:1]. GbE can grant one or more masters write access to the GbE region 3
overriding the permissions in the Flash Descriptor.
Master[1] is Host Processor/BIOS, Master[2] is Intel
®
Management Engine, Master[3]
is Host processor/GbE.
The contents of this register are locked by the FLOCKDN bit.
24:20 Reserved
19:17
GbE Master Read Access Grant (GMRAG) — R/W. Each bit 19:17 corresponds to
Master[3:1]. GbE can grant one or more masters read access to the GbE region 3
overriding the read permissions in the Flash Descriptor.
Master[1] is Host processor/BIOS, Master[2] is Intel
®
Management Engine, Master[3]
is GbE.
The contents of this register are locked by the FLOCKDN bit
16:12 Reserved
11:8
GbE Region Write Access (GRWA) — RO. Each bit 11:8 corresponds to Regions 3:0.
If the bit is set, this master can erase and write that particular region through register
accesses.
The contents of this register are that of the Flash Descriptor. Flash Master 3.Master
Region Write Access OR a particular master has granted GbE write permissions in their
Master Write Access Grant register OR the Flash Descriptor Security Override strap is
set.
7:4 Reserved
3:0
GbE Region Read Access (GRRA) — RO. Each bit 3:0 corresponds to Regions 3:0. If
the bit is set, this master can read that particular region through register accesses.
The contents of this register are that of the Flash Descriptor. Flash Master 3.Master
Region Write Access OR a particular master has granted GbE read permissions in their
Master Read Access Grant register.
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