Thermal Sensor Registers (D31:F6)
858 Datasheet
22.2.8 TSGPEN—Thermal Sensor General Purpose Event Enable
Offset Address:  TBARB+0Dh Attribute: R/W
Default Value:  00h Size: 8 bit
This register controls the conditions that result in General Purpose events to be 
signalled from Thermal Sensor trip events.
Bit Description
7
Auxiliary2 High-to-Low Enable — R/W. 
0 = Corresponding status bit does not result in General Purpose event.
1 = General purpose event is signaled when the corresponding status bit is set in the 
Thermal Error Status Register.
6
Catastrophic High-to-Low Enable — R/W. 
0 = Corresponding status bit does not result in General Purpose event.
1 = General purpose event is signaled when the corresponding status bit is set in the 
Thermal Error Status Register.
5
Hot High-to-Low Enable — R/W. 
0 = Corresponding status bit does not result in General Purpose event.
1 = General purpose event is signaled when the corresponding status bit is set in the 
Thermal Error Status Register.
4
Auxiliary High-to-Low Enable — R/W. 
0 = Corresponding status bit does not result in General Purpose event.
1 = General purpose event is signaled when the corresponding status bit is set in the 
Thermal Error Status Register.
3
Auxiliary2 Low-to-High Enable — R/W. 
0 = Corresponding status bit does not result in General Purpose event.
1 = General purpose event is signaled when the corresponding status bit is set in the 
Thermal Error Status Register.
2
Catastrophic Low-to-High Enable — R/W. 
0 = Corresponding status bit does not result in General Purpose event.
1 = General purpose event is signaled when the corresponding status bit is set in the 
Thermal Error Status Register.
1
Hot Low-to-High Enable— R/W.
0 = Corresponding status bit does not result in General Purpose event.
1 = General purpose event is signaled when the corresponding status bit is set in the 
Thermal Error Status Register.
0
Auxiliary Low-to-High Enable — R/W.
0 = Corresponding status bit does not result in General Purpose event.
1 = General purpose event is signaled when the corresponding status bit is set in the 
Thermal Error Status Register.