Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - Page 897

Datasheet 897
Intel® Management Engine Interface (MEI) Subsystem Registers (D22:F0)
23.5.8 PCMDBA—Primary Command Block IO Bar Register
(IDER—D22:F2)
Address Offset: 10–13h Attribute: RO, R/W
Default Value: 00000001h Size: 32 bits
23.5.9 PCTLBA—Primary Control Block Base Address Register
(IDER—D22:F2)
Address Offset: 14–17h Attribute: RO, R/W
Default Value: 00000001h Size: 32 bits
23.5.10 SCMDBA—Secondary Command Block Base Address
Register (IDER—D22:F2)
Address Offset: 18–1Bh Attribute: RO, R/W
Default Value: 00000001h Size: 32 bits
Bit Description
31:16 Reserved
15:3
Base Address (BAR)—R/W Base Address of the BAR0 I/O space (8 consecutive I/O
locations).
2:1 Reserved
0 Resource Type Indicator (RTE)—RO. This bit indicates a request for I/O space.
Bit Description
31:16 Reserved
15:2
Base Address (BAR)—R/W. Base Address of the BAR1 I/O space (4 consecutive I/O
locations)
1Reserved
0 Resource Type Indicator (RTE)—RO. This bit indicates a request for I/O space
Bit Description
31:16 Reserved
15:3
Base Address (BAR)—R/W. Base Address of the I/O space (8 consecutive I/O
locations).
2:1 Reserved
0 Resource Type Indicator (RTE)—RO. This bit indicates a request for I/O space.