Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - Page 898

Intel® Management Engine Interface (MEI) Subsystem Registers (D22:F0)
898 Datasheet
23.5.11 SCTLBA—Secondary Control Block base Address
Register (IDER—D22:F2)
Address Offset: 1C–1Fh Attribute: RO, R/W
Default Value: 00000001h1 Size: 32 bits
23.5.12 LBAR—Legacy Bus Master Base Address Register
(IDER—D22:F2)
Address Offset: 20–23h Attribute: RO, R/W
Default Value: 00000001h Size: 32 bits
23.5.13 SVID—Subsystem Vendor ID Register (IDER—D22:F2)
Address Offset: 2Ch–2Dh Attribute: R/WO
Default Value: 0000h Size: 16 bits
23.5.14 SID—Subsystem ID Register (IDER—D22:F2)
Address Offset: 2Eh–2Fh Attribute: R/WO
Default Value: 8086h Size: 16 bits
Bit Description
31:16 Reserved
15:2
Base Address (BAR)—R/W. Base Address of the I/O space (4 consecutive I/O
locations).
1 Reserved
0 Resource Type Indicator (RTE)—RO. This bit indicates a request for I/O space.
Bit Description
31:16 Reserved
15:4
Base Address (BA)—R/W. Base Address of the I/O space (16 consecutive I/O
locations).
3:1 Reserved
0 Resource Type Indicator (RTE)—RO. This bit indicates a request for I/O space.
Bit Description
15:0
Subsystem Vendor ID (SSVID) — R/WO. Indicates the sub-system vendor
identifier. This field should be programmed by BIOS during boot-up. Once written, this
register becomes Read Only. This field can only be cleared by PLTRST#.
NOTE: Register must be written as a DWord write with SID register.
Bit Description
15:0
Subsystem ID (SSID) — R/WO. Indicates the sub-system identifier. This field should
be programmed by BIOS during boot-up. Once written, this register becomes Read
Only. This field can only be cleared by PLTRST#.
NOTE: Register must be written as a DWord write with SVID register.