Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - Page 900

Intel® Management Engine Interface (MEI) Subsystem Registers (D22:F0)
900 Datasheet
23.5.18 PC—PCI Power Management Capabilities Register
(IDER—D22:F2)
Address Offset: CA–CBh Attribute: RO
Default Value: 0023h Size: 16 bits
Bit Description
15:11
PME_Support (PSUP) — RO. This five-bit field indicates the power states in which
the function may assert PME#. IDER can assert PME# from any D-state except D1 or
D2 which are not supported by IDER.
10:9 Reserved
8:6
Aux_Current (AC) — RO. Reports the maximum Suspend well current required
when in the D3
cold
state. Value of 00b is reported.
5
Device Specific Initialization (DSI) — RO. Indicates whether device-specific
initialization is required.
4 Reserved
3 PME Clock (PMEC) — RO. Indicates that PCI clock is not required to generate PME#.
2:0
Version (VS) — RO. Hardwired to 011b to indicate support for Revision 1.2 of the
PCI Power Management Specification.