Intel 6 SERIES CHIPSET - DATASHEET 01-2011

PCH Pin States
98 Datasheet
Clocking Signals
CLKOUT_ITPXDP_P
CLKOUT_ITPXDP_N
Core Running Running Running Off Off
CLKOUT_DP_P
CLKOUT_DP_N
Core Running Running Running Off Off
CLKOUT_DMI_P,
CLKOUT_DMI_N
Core Running Running Running Off Off
CLKOUT_PEG_A_P,
CLKOUT_PEG_A_N
Core Running Running Running Off Off
CLKOUT_PEG_B_P,
CLKOUT_PEG_B_N
Core Running Running Running Off Off
CLKOUT_PCIE[7:0]P,
CLKOUT_PCIE[7:0]N
Core Running Running Running Off Off
CLKOUT_PCI[4:0] Core Running Running Running Off Off
CLKOUTFLEX[3:0]/
GPIO[67:64]
Core Low Running Running Off Off
XTAL25_OUT Core Running Running Running Off Off
XCLK_RCOMP Core High-Z High-Z High-Z Off Off
Intel
®
High Definition Audio Interface
HDA_RST# Suspend Low Low
3
Defined Low Low
HDA_SDO
7
Suspend Low Low Defined Low Low
HDA_SYNC
7
Suspend Low Low Defined Low Low
HDA_BCLK
13
Suspend Low Low Low Low Low
UnMultiplexed GPIO Signals
GPIO8
7
Suspend High High Defined Defined Defined
GPIO15
7
Suspend Low Low Defined Defined Defined
GPIO27
7
(Non-Deep S4/
S5 mode)
DSW High-Z High-Z High-Z High-Z High-Z
GPIO27
7
(Deep S4/S5
mode)
DSW High-Z High-Z High-Z High-Z High-Z
GPIO28
12
Suspend High Low Low Low Low
GPIO32 Core High High Defined Off Off
GPIO57 Suspend Low High-Z (Input) Defined Defined Defined
GPIO72
9
Suspend High High Defined Defined Defined
Multiplexed GPIO Signals used as GPIO only
GPIO0 Core High-Z (Input) High-Z (Input) Defined Off Off
GPIO13
9
Suspend High-Z High-Z High-Z High-Z High-Z
GPIO30
9
Suspend High-Z (Input) High-Z (Input) Defined Defined Defined
Table 3-2. Power Plane and States for Output and I/O Signals for Desktop Configurations
(Sheet 4 of 6)
Signal Name
Power
Plane
During
Reset
1
Immediately
after Reset
1
S0/S1 S3 S4/S5