RFL 9300 RFL Electronics Inc.
October 29, 2001 10 - 8 (973) 334-3100
10.3.8 OTHER MICROCONTROLLER I/O PORT SIGNALS
Some other microcontroller I/O port signals are described below. Their pin numbers are listed next to their
names.
COMM1 ALARM (U4-1)
COMM2 ALARM (U4-4)
These are active-high alarm signals that show the alarm status of the Communications Controller Mod-
ule (or modules). In a two-terminal system environment, COMM2 ALARM will always be active high
(logic 1); however, the microcontroller is programmed to ignore it.
TRIP EN (U4-9)
This signal is received from the Relay I/O module (Section 20). This signal is a logic low when the dis-
play controller has disabled trip by de-energizing relay K1 on the Relay I/O module. This indicates that
trip is disabled.
SUPER_RD (U4-12)
This is a locally-generated, positive-going interrupt signal received from U28A-5. It goes high when the
phase controllers have completed their access to the non-volatile static RAM mailbox memory, telling
the Supervisor Controller that it should grant the Communications Controller access to the memory.
60/50_HZ (U3-18)
This is a hardware signal directly from Jumper J1 through U3-18. It is supplied to the display controller
and all phase controllers. It is a logic one when the 60-Hz position is selected, and logic zero for 50-Hz
operation.
SUPR/W (U3-12)
COMM_EN (U3-9)
PCR/WEN (U3-7)
These are control signals associated with mailbox access. The COMM_EN and PCR/WEN signals will
be disabled if the watchdog timer fails to operate. In this case, the HI-Z signal (U20-19) will disable the
U3 2Y1-U3 2Y4 outputs and the U1 Y1-U1 Y4 outputs.
DTT EN (U3-5)
This is the active-low trip signal supplied to the oscillography board as a result of receiving a direct
transfer trip message from the remote RFL9300. DTT EN is disabled if the watchdog timer expires.
SYSTEM CLOCK (U3-3)
This signal synchronizes the Supervisor Controller with all four phase controller, communications con-
troller and single-pole logic programs. It guarantees that all phase controllers sample the CT waveforms
at the same instant. This signal is disabled if the watchdog timer expires. If the RFL9300 is set for 60-Hz
operation, SYSTEM CLOCK is a 2-kHz square wave; it is 1.667 kHz for 50-Hz units. If the relay is con-
figured for 3-terminal operation, the system clock is phase locked at 33 x the line frequency in Hz.
SP_CHASSIS (P1-C29)
SV_DAT (U9-25)
SP_DETECT (U9-26)
These are signals associated with the single-pole trip function. See 10.3.5 for a description of these sig-
nals.
DC RDY (U1-4)
This is a serial communications handshake control signal. received from the display controller
(Section 9). Its function was described in paragraph 10.3.4 of this manual.
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