Controller area network (bxCAN) UM0306
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CAN filter FIFO assignment register (CAN_FFA0R)
Address Offset: 214h
Reset Value: 00h
Note: This register can be written only when the filter initialization mode is set (FINIT=1) in the
CAN_FMR register.
CAN filter activation register (CAN_FA0R)
Address Offset: 21Ch
Reset Value: 00h
Filter bank x registers (CAN_FxR[1:0]) (x=0..13)
Address Offsets: 240h..2ACh
Reset Value: xxh
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
1514131211109876543210
Reserved FFA13 FFA12 FFA11 FFA10 FFA9 FFA8 FFA7 FFA6 FFA5 FFA4 FFA3 FFA2 FFA1 FFA0
rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:14 Reserved, forced by hardware to 0.
Bits 13:0
FFAx: Filter FIFO Assignment for Filter x
The message passing through this filter will be stored in the specified FIFO.
0: Filter assigned to FIFO 0
1: Filter assigned to FIFO 1
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
1514131211109876543210
Reserved
FACT
13
FACT
12
FACT
11
FACT
10
FACT9 FACT8 FACT7 FACT6 FACT5 FACT4 FACT3 FACT2 FACT1 FACT0
rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:14 Reserved, forced by hardware to 0.
Bits 13:0
FACTx: Filter Active
The software sets this bit to activate Filter x. To modify the Filter x registers
(CAN_FxR[0:7]), the FACTx bit must be cleared or the FINIT bit of the CAN_FMR
register must be set.
0: Filter x is not active
1: Filter x is active