Serial peripheral interface (SPI) UM0306
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16.4.4 SPI data register (SPI_DR)
Address Offset: 0Ch
Reset Value: 0000 0000 (0000h)
16.4.5 SPI CRC polynomial register (SPI_CRCPR)
Address Offset: 10h
Reset Value: 0000 0111 (0007h)
16.4.6 SPI Rx CRC register (SPI_RXCRCR)
Address Offset: 14h
Reset Value: 0000 0000 (0000h)
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DR[15:0]
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Bits 15:0
DR[15:0]: Data register
Data received or to be transmitted.
The data register is split into 2 buffers - one for writing (Transmit Buffer) and
another one for reading (Receive buffer). A write to the data register will write
into the Tx buffer and a read from the data register will return the value held
in the Rx buffer.
Notes:
Depending on the data frame format selection bit (DFF in SPI_CR1 register),
the data sent or received is either 8-bit or 16-bit. This selection has to be made
before enabling SPI to ensure correct operation.
For an 8-bit data frame, the buffers are 8-bit and only the LSB of the register
(SPI_DR[7:0]) is used for transmission/reception. When in reception mode, the
MSB of the register (SPI_DR[15:8]) is forced to 0.
For a 16-bit data frame, the buffers are 16-bit and the entire register,
SPI_DR[15:0] is used for transmission/reception.
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CRCPOLY[15:0]
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Bits 15:0
CRCPOLY[15:0]: CRC polynomial register
This register contains the polynomial for the CRC calculation.
The CRC polynomial (0007h) is the reset value of this register. Another
polynomial can be configured as required.
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RxCRC[15:0]
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