UM0306 Universal synchronous asynchronous receiver transmitter (USART)
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– Overrun error
– Framing error
– Noise error
– Parity error
● Multi-Processor communication - enter into mute mode if address match does not
occur
● Wake up from mute mode (by idle line detection or address mark detection)
● Two receiver wake-up modes:
– Address bit (MSB)
– Idle line
17.2 General description
The interface is externally connected to another device by three pins (see Figure 144). Any
USART bidirectional communication requires a minimum of two pins: Receive Data In (RX)
and Transmit Data Out (TX):
RX: Receive Data Input is the serial data input. Oversampling techniques are used for data
recovery by discriminating between valid incoming data and noise.
TX: Transmit Data Output. When the transmitter is disabled, the output pin returns to its I/O
port configuration. When the transmitter is enabled and nothing is to be transmitted, the TX
pin is at high level. In single-wire and smartcard modes, this I/O is used to transmit and
receive the data (at USART level, data are then received on SW_RX).
Through these pins, serial data is transmitted and received in normal USART mode as
frames comprising:
● An Idle Line prior to transmission or reception
● A start bit
● A data word (8 or 9 bits) least significant bit first
● 0.5,1, 1.5, 2 Stop bits indicating that the frame is complete
● This interface uses a fractional baud rate generator - with a 12-bit mantissa and 4-bit
fraction
● A status register (USART_SR)
● Data Register (USART_DR)
● A baud rate register (USART_BRR) - 12-bit mantissa and 4-bit fraction.
● A Guardtime Register (USART_GTPR) in case of Smartcard mode.
Refer to the register description for the definitions of each bit.
Following pin is required to interface in synchronous mode.
SCLK: Transmitter clock output. This pin outputs the transmitter data clock for synchronous
transmission corresponding to SPI master mode (no clock pulses on start bit and stop bit,
and a software option to send a clock pulse on the last data bit). In parallel data can be
received synchronously on RX. This can be used to control peripherals that have shift
registers (e.g. LCD drivers). The clock phase and polarity are software programmable. In
smartcard mode, SCLK can provide the clock to the smartcard.
Following pins are required to interface in IrDA mode.
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