UM0306 Analog/digital converter (ADC)
483/519
19.13.12 ADC injected sequence register (ADC_JSQR)
Address offset: 38h
Reset value: 0000 0000h
Bits 9:5 SQ2[4:0]: 2nd conversion in regular sequence
Bits 4:0 SQ1[4:0]: 1st conversion in regular sequence
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved JL[1:0] JSQ4[4:1]
rw rw rw rw rw rw
1514131211109876543210
JSQ4_0
JSQ3[4:0] JSQ2[4:0] JSQ1[4:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:22 Reserved, must be kept cleared.
Bits 21:20
JL[1:0]: Injected Sequence length
These bits are written by software to define the total number of conversions in
the injected channel conversion sequence.
00: 1 conversion
01: 2 conversions
10: 3 conversions
11: 4 conversions
Bits 19:15
JSQ4[4:0]: 4th conversion in injected sequence
These bits are written by software with the channel number (0..17) assigned
as the 4th in the sequence to be converted.
Note: Unlike a regular conversion sequence, if JL[1:0] length is less than four,
the channels are converted in a sequence starting from (4-JL). Example:
ADC_JSQR[21:0] = 10 00011 00011 00111 00010 means that a scan
conversion will convert the following channel sequence: 7, 3, 3. (not 2, 7, 3)
Bits 14:10 JSQ3[4:0]: 3rd conversion in injected sequence
Bits 9:5 JSQ2[4:0]: 2nd conversion in injected sequence
Bits 4:0 JSQ1[4:0]: 1st conversion in injected sequence
To Next Page
Loading...
Need help?
General
