AMCC PPC405 - Page 14

14 AMCC Proprietary
Revision 1.02 - September 10, 2007
PPC405 Processor
Preliminary User’s Manual
Table 6-9. Register Settings during External Interrupts ..................................................................................122
Table 6-10. Alignment Interrupt Summary ........................................................................................................123
Table 6-11. Register Settings during Alignment Interrupts ...............................................................................123
Table 6-12. ESR Usage for Program Interrupts ................................................................................................123
Table 6-13. Register Settings during Program Interrupts ..................................................................................124
Table 6-14. Register Settings during System Call Interrupts ............................................................................125
Table 6-15. Register Settings during Programmable Interval Timer Interrupts .................................................125
Table 6-16. Register Settings during Fixed Interval Timer Interrupts ................................................................126
Table 6-17. Register Settings during Watchdog Timer Interrupts .....................................................................126
Table 6-18. Register Settings during Data TLB Miss Interrupts ........................................................................127
Table 6-19. Register Settings during Instruction TLB Miss Interrupts ...............................................................127
Table 6-20. SRR2 during Debug Interrupts .......................................................................................................128
Table 6-21. Register Settings during Debug Interrupts .....................................................................................128
Table 7-1. Time Base Access .........................................................................................................................130
Table 7-2. FIT Controls ...................................................................................................................................132
Table 7-3. Watchdog Timer Controls ..............................................................................................................133
Table 7-4. Watchdog Timer State Machine .....................................................................................................134
Table 8-1. JTAG Instructions ..........................................................................................................................138
Table 8-2. Debug Events ................................................................................................................................148
Table 8-3. DAC Applied to Cache Instructions ................................................................................................152
Table 8-4. Setting of DBSR Bits for DAC and DVC Events ............................................................................154
Table 8-5. Comparisons Based on DBCR1[DVnM] ........................................................................................154
Table 8-6. Comparisons for Aligned DVC Accesses .......................................................................................155
Table 8-7. Comparisons for Misaligned DVC Accesses .................................................................................155
Table 9-1. Implementation-Specific Instructions .............................................................................................157
Table 9-2. Operator Precedence .....................................................................................................................160
Table 9-3. Extended Mnemonics for addi .......................................................................................................164
Table 9-4. Extended Mnemonics for addic ......................................................................................................165
Table 9-5. Extended Mnemonics for addic. .....................................................................................................166
Table 9-6. Extended Mnemonics for addis ......................................................................................................167
Table 9-7. Extended Mnemonics for bc, bca, bcl, bcla ...................................................................................176
Table 9-8. Extended Mnemonics for bcctr, bcctrl ............................................................................................181
Table 9-9. Extended Mnemonics for bclr, bclrl ................................................................................................184
Table 9-10. Extended Mnemonics for cmp .......................................................................................................188
Table 9-11. Extended Mnemonics for cmpi ......................................................................................................189
Table 9-12. Extended Mnemonics for cmpl ......................................................................................................190
Table 9-13. Extended Mnemonics for cmpli .....................................................................................................191
Table 9-14. Extended Mnemonics for creqv .....................................................................................................195
Table 9-15. Extended Mnemonics for crnor ........................................................................................
..............197
Table 9-16. Extended Mnemonics for cror ........................................................................................................198
Table 9-17. Extended Mnemonics for crxor ......................................................................................................200