AMCC PPC405 - CR Logical Instructions; Rotate Instructions; Shift Instructions; Table 2-20. CR Logical Instructions

AMCC Proprietary 65
Revision 1.02 - September 10, 2007
PPC405 Processor
Preliminary User’s Manual
2.11.6.1 CR Logical Instructions
These instructions perform logical operations on a specified pair of bits in the CR, placing the result in another
specified bit. These instructions can logically combine the results of several comparisons without incurring the
overhead of conditional branch instructions. Software performance can significantly improve if multiple conditions
are tested at once as part of a branch decision.
Table 2-20 lists the PPC405 condition register logical instructions.
2.11.6.2 Rotate Instructions
These instructions rotate operands stored in the GPRs. Rotate instructions can also mask rotated operands.
Table 2-21 lists the PPC405 rotate instructions. In the table, the syntax [.] indicates that the instruction has a
“record” form that updates CR[CR0], and a “non-record” form.
2.11.6.3 Shift Instructions
These instructions shift operands stored in the GPRs.
Table 2-22 lists the PPC405 shift instructions. Shift right algebraic instructions implicitly update XER[CA]. In the
table, the syntax [.] indicates that the instruction has a “record” form that updates CR[CR0], and a “non-record”
form.
Table 2-20. CR Logical Instructions
crand
crandc
creqv
crnand
crnor
cror
crorc
crxor
mcrf
Table 2-21. Rotate Instructions
Rotate and Insert Rotate and Mask
rlwimi[.]
rlwinm[.]
rlwnm[.]
Table 2-22. Shift Instructions
Shift Left Shift Right
Shift Right
Algebraic
slw[.] srw[.]
sraw[.]
srawi[.]