AMCC PPC405 - Rotate and Shift Instructions

AMCC Proprietary 426
Revision 1.02 - September 10, 2007
PPC405 Processor
Preliminary User’s Manual
B.10 Rotate and Shift Instructions
Rotate and shift instructions rotate and shift operands which are stored in the general purpose registers. Rotate
instructions can also mask rotated operands. Table B-11 shows the PPC405 rotate and shift instructions.
cmpli BF, 0, RA, IM Compare (RA) to (
16
0 || IM), unsigned.
Results in CR[CRn], where n = BF.
191
Table B-11. Rotate and Shift Instructions
Mnemonic Operands Function
Other Registers
Changed
Page
rlwimi RA, RS, SH, MB,
ME
Rotate left word immediate, then insert according to mask.
r ← ROTL((RS), SH)
m
← MASK(MB, ME)
(RA) ← (r ∧ m) ∨ ((RA) ∧¬m)
299
rlwimi. CR[CR0]
rlwinm RA, RS, SH, MB,
ME
Rotate left word immediate, then AND with mask.
r
← ROTL((RS), SH)
m ← MASK(MB, ME)
(RA) ← (r ∧ m)
300
rlwinm. CR[CR0]
rlwnm RA, RS, RB, MB,
ME
Rotate left word, then AND with mask.
r
← ROTL((RS), (RB)
27:31
)
m ← MASK(MB, ME)
(RA) ← (r ∧ m)
302
rlwnm. CR[CR0]
slw RA, RS, RB Shift left (RS) by (RB)
27:31
.
n
← (RB)
27:31.
r ← ROTL((RS), n).
if (RB)
26
= 0 then m ← MASK(0, 31 – n)
else m
←
32
0.
(RA) ← r ∧ m.
304
slw. CR[CR0]
sraw RA, RS, RB Shift right algebraic (RS) by (RB)
27:31
.
n ← (RB)
27:31
.
r
← ROTL((RS), 32 – n).
if (RB)
26
= 0 then m ← MASK(n, 31)
else m
←
32
0.
s
← (RS)
0.
(RA) ← (r ∧ m) ∨ (
32
s ∧¬m).
XER[CA]
← s ∧ ((r ∧¬m) ≠ 0).
305
sraw. CR[CR0]
srawi RA, RS, SH Shift right algebraic (RS) by SH.
n
← SH.
r ← ROTL((RS), 32 – n).
m
← MASK(n, 31).
s
← (RS)
0.
(RA) ← (r ∧ m) ∨ (
32
s ∧¬m).
XER[CA] ← s ∧ ((r ∧¬m)≠0).
306
srawi. CR[CR0]
srw RA, RS, RB Shift right (RS) by (RB)
27:31
.
n
← (RB)
27:31
.
r
← ROTL((RS), 32 – n).
if (RB)
26
= 0 then m ← MASK(n, 31)
else m
←
32
0.
(RA)
← r ∧ m.
307
srw. CR[CR0]
Table B-10. Comparison Instructions (Continued)
Mnemonic Operands Function
Other Registers
Changed
Page