AMCC PPC405 - Table 9-29. Extended Mnemonics for Rlwnm, Rlwnm

AMCC Proprietary 302
Revision 1.02 - September 10, 2007
PPC405 Processor
rlwnm
Rotate Left Word then AND with Mask
Preliminary User’s Manual
rlwnm
Rotate Left Word then AND with Mask
r ← ROTL((RS), (RB)
27:31
)
m
← MASK(MB, ME)
(RA) ← r ∧ m
The contents of register RS are rotated left by the number of bit positions specified by the contents of register
RB
27:31
. A mask is generated, having 1-bits starting at the bit position specified in the MB field and ending in the bit
position specified by the ME field with 0-bits elsewhere.
If the starting point of the mask is at a higher bit position than the ending point, the ones portion of the mask wraps
from the highest bit position back to the lowest. The rotated data is ANDed with the generated mask and the result
is placed into register RA.
Registers Altered
•RA
• CR[CR0]
LT, GT, EQ, SO
if Rc contains 1
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
rlwnm RA, RS, RB, MB, ME Rc=0
rlwnm. RA, RS, RB, MB, ME Rc=1
23 RS RA RB MB ME Rc
0 6 11 16 21 26 31
Table 9-29. Extended Mnemonics for rlwnm, rlwnm.
Mnemonic Operands Function
Other Registers
Altered
rotlw
RA, RS, RB
Rotate left.
(RA)
← ROTL((RS), (RB)
27:31
)
Extended mnemonic for
rlwnm RA,RS,RB,0,31
rotlw.
Extended mnemonic for
rlwnm. RA,RS,RB,0,31
CR[CR0]