AMCC Proprietary 17
Revision 1.02 - September 10, 2007
PPC405 Processor
Preliminary User’s Manual
About This Book
This user’s manual provides the architectural overview, programming model, and detailed information about the
registers, the instruction set, and operations of the AMCC PowerPC™ 405 (PPC405) embedded processor. This
device contains a 32-bit reduced instruction set computer (RISC) processor.
The PPC405 RISC embedded processor features:
• PowerPC Architecture™
• Single-cycle execution for most instructions
• Instruction cache unit and data cache unit
• Support for little endian operation
• Interrupt interface for one critical and one non-critical interrupt signal
• JTAG interface
Who Should Use This Book
This book is for system hardware and software developers, and for application developers who need to understand
the PPC405. The audience should understand network processor design, network system design, operating
systems, RISC processing, and design for testability.
To Next Page
Loading...