AMCC PPC405 - Figure 5-3. ITLB;DTLB;UTLB Address Resolution

98 AMCC Proprietary
Revision 1.02 - September 10, 2007
PPC405 Processor
Preliminary User’s Manual
Figure 5-3. ITLB/DTLB/UTLB Address Resolution
Generate I-side
Effective Address
Extract Real
Address from ITLB
Continue I-cache
Access
Perform ITLB
Look-up
Translation Disabled
(MSR[IR]=0)
Translation Enabled
(MSR[IR] = 1)
I-Side TLB Miss
or
D-Side TLB Miss
No Translation
Translation Enabled
(MSR[DR] = 1)
Translation Disabled
(MSR[DR] = 0)
No Translation
Generate D-side
Effective Address
Perform DTLB
Look-up
ITLB MissITLB Hit
Perform UTLB
Look-up
DTLB Miss DTLB Hit
Extract Real
Address from UTLB
Access
Continue I-cache
or D-cache
Access
UTLB MissUTLB Hit
Extract Real
Address from DTLB
Route Address
to ITLB
Route Address
to DTLB
Exception