AMCC PPC405 - 2.3.3 Condition Register (CR)

AMCC Proprietary 39
Revision 1.02 - September 10, 2007
PPC405 Processor
Preliminary User’s Manual
2.3.2.4 Special Purpose Registers (USPRG0 and SPRG0–SPRG7)
USPRG0 and SPRG0–SPRG7 are provided for general purpose software use. For example, these registers are
used as temporary storage locations. For example, an interrupt handler might save the contents of a GPR to an
SPRG, and later restore the GPR from it. This is faster than a save/restore to a memory location. These registers
are written using mtspr and read using mfspr.
Access to USPRG0 is non-privileged for both read and write.
Access to SPRG0–SPRG7 is privileged, except for read access to SPRG4–SPRG7. See Privileged SPRs on
page 57 for more information.
2.3.2.5 Processor Version Register (PVR)
The PVR is a read-only register that uniquely identifies a standard product or Core+ASIC implementation. Software
can examine the PVR to recognize implementation-dependent features and determine available hardware
resources.
Access to the PVR is privileged. See “Privileged SPRs” on page 57 for more information.
2.3.3 Condition Register (CR)
The CR contains eight 4-bit fields (CR0–CR7), as shown in Figure 2-9. The fields contain conditions detected
during the execution of integer or logical compare instructions. The CR contents can be used in conditional branch
instructions.
The CR can be modified in any of the following ways:
• mtcrf sets specified CR fields by writing to the CR from a GPR, under control of a mask specified as an
instruction field.
• mcrf sets a specified CR field by copying another CR field to it.
• mcrxr copies certain bits of the XER into a designated CR field, and then clears the corresponding XER bits.
• The “with update” forms of integer instructions implicitly update CR[CR0].
• Integer compare instructions update a specified CR field.
• The CR-logical instructions update a specified CR bit with the result of a logical operation on a specified pair of
CR bit fields.
• Conditional branch instructions can test a CR bit as one of the branch conditions.
Figure 2-7. Special Purpose Register General (SPRG0–SPRG7)
0:31 General data Software value; no hardware usage.
Figure 2-8. Processor Version Register (PVR)
0:31 Assigned PVR value