AMCC Proprietary 45
Revision 1.02 - September 10, 2007
PPC405 Processor
Preliminary User’s Manual
C structure mapping rules permit the use of padding (skipped bytes) to align scalars on desirable boundaries. The
structure mapping examples show each scalar aligned at its natural boundary. This alignment introduces padding
of four bytes between a and b, one byte between d and e, and two bytes between e and f. The same amount of
padding is present in both big endian and little endian mappings.
2.5.1.1 Big Endian Mapping
The big endian mapping of structure s follows. (The data is highlighted in the structure mappings. Addresses, in
hexadecimal, are below the data stored at the address. The contents of each byte, as defined in structure s, is
shown as a (hexadecimal) number or character (for the string elements).
2.5.1.2 Little Endian Mapping
Structure s is shown mapped little endian.
2.5.2 Support for Little Endian Byte Ordering
Except as noted, this book describes the processor as if it operated only in a big endian fashion. In fact, the
PowerPC Embedded Environment also supports little endian operation.
The PowerPC little endian mode, defined in the PowerPC Architecture, is not implemented.
11 12 13 14
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07
21 22 23 24 25 26 27 28
0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
31 32 33 34 'A' 'B' 'C' 'D'
0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17
'E' 'F' 'G' 51 52
0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F
61 62 63 64
0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27
14 13 12 11
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07
28 27 26 25 24 23 22 21
0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
34 33 32 31 'A' 'B' 'C' 'D'
0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17
'E' 'F' 'G' 52 51
0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F
64 63 62 61
0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27
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