AMCC PPC405 - Figure 2-11. Normal Word Load or Store (Big Endian Storage Region); Figure 2-12. Byte-Reverse Word Load or Store (Little Endian Storage Region); Figure 2-13. Byte-Reverse Word Load or Store (Big Endian Storage Region)

AMCC Proprietary 48
Revision 1.02 - September 10, 2007
PPC405 Processor
Preliminary User’s Manual
Note that the results are identical to the results of a load/store with byte-reverse in a little endian storage region, as
illustrated in Figure 2-12.
Figure 2-13 illustrates the contents of a GPR and memory (starting at address 00) after a load/store with byte-
reverse in a big endian storage region.
Figure 2-11. Normal Word Load or Store (Big Endian Storage Region)
Figure 2-12. Byte-Reverse Word Load or Store (Little Endian Storage Region)
Figure 2-13. Byte-Reverse Word Load or Store (Big Endian Storage Region)
GPR
LSB
MSB
Memory
0x00 0x01 0x02 0x03
11 12 13 14
11 12 13 14
GPR
LSB
MSB
Memory
0x00 0x01 0x02 0x03
11 12 13 14
11 12 13 14
GPR
LSB
MSB
Memory
0x00 0x01 0x02 0x03
11 12 13 14
14 13 12 11