AMCC PPC405 - Figure 2-6. Fixed Point Exception Register (XER); Table 2-2. XER[CA] Updating Instructions; Table 2-3. XER[SO,OV] Updating Instructions

AMCC Proprietary 38
Revision 1.02 - September 10, 2007
PPC405 Processor
Preliminary User’s Manual
The Transfer Byte Count (TBC) field is the byte count for load/store string instructions.
The XER is part of the user programming model.
Table 2-2 and Table 2-3 list the PPC405 instructions that update the XER. In the tables, the syntax “[o]” indicates
that the instruction has an “o” form that updates XER[SO,OV], and a “non-o” form. The syntax “[.]” indicates that the
instruction has a “record” form that updates CR[CR0] (see “Condition Register (CR)” on page 39), and a “non-
record” form.
Figure 2-6. Fixed Point Exception Register (XER)
0SO
Summary Overflow
0 No overflow has occurred.
1 Overflow has occurred.
Can be set by mtspr or by using “o” form
instructions; can be
reset by mtspr or by mcrxr.
1OV
Overflow
0 No overflow has occurred.
0 Overflow has occurred.
Can be set by mtspr or by using “o” form
instructions; can be
reset by mtspr, by mcrxr,
or “o” form instructions.
2CA
Carry
0 Carry has not occurred.
1 Carry has occurred.
Can be set by mtspr or arithmetic instructions
that update the CA field; can be
reset by mtspr,
by
mcrxr, or by arithmetic instructions that update
the CA field.
3:24
Reserved
25:31 TBC Transfer Byte Count Used by lswx and stswx; written by mtspr.
Table 2-2. XER[CA] Updating Instructions
Integer Arithmetic
Integer
Shift
Processor
Control
Add Subtract
Shift
Right
Algebraic
Register
Management
addc[o][.]
adde[o][.]
addic[.]
addme[o][.]
addze[o][.]
subfc[o][.]
subfe[o][.]
subfic
subfme
[o][.]
subfze[o][.]
sraw[.]
srawi[.]
mtspr
mcrxr
Table 2-3. XER[SO,OV] Updating Instructions
Integer Arithmetic Auxiliary Processor
Processor
Control
Add Subtract Multiply Divide Negate
Multiply-
Accumulate
Negative
Multiply-
Accumulate
Register
Management
addo[.]
addco[.]
addeo[.]
addmeo[.]
addzeo[.]
subfo[.]
subfco[.]
subfeo[.]
subfmeo[.]
subfzeo[.]
mullwo[.]
divwo[.]
divwuo[.]
nego[.]
macchwo[.]
macchwso[.]
macchwsuo[.]
macchwuo[.]
machhwo[.]
machhwso[.]
machhwsuo[.]
machhwuo[.]
maclhwo[.]
maclhwso[.]
maclhwsuo[.]
maclhwuo[.]
nmacchwo[.]
nmacchwso[.]
nmachhwo[.]
nmachhwso[.]
nmaclhwo[.]
nmaclhwso[.]
mtspr
mcrxr