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AMCC PPC405 - Table 9-26. Extended Mnemonics for Ori

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AMCC Proprietary 295
Revision 1.02 - September 10, 2007
PPC405 Processor
ori
OR Immediate
Preliminary User’s Manual
ori
OR Immediate
(RA) (RS) (
16
0||IM)
The IM field is extended to 32 bits by concatenating 16 0-bits on the left. Register RS is ORed with the extended IM
field; the result is placed into register RA.
Registers Altered
•RA
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
ori RA, RS, IM
24 RS RA IM
0 6 11 16 31
Table 9-26. Extended Mnemonics for ori
Mnemonic Operands Function
Other Registers
Changed
nop
Preferred no-op; triggers optimizations based on no-ops.
Extended mnemonic for
ori 0,0,0

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