AMCC Proprietary 296
Revision 1.02 - September 10, 2007
PPC405 Processor
oris
OR Immediate Shifted
Preliminary User’s Manual
oris
OR Immediate Shifted
(RA) ← (RS) ∨ (IM ||
16
0)
The IM Field is extended to 32 bits by concatenating 16 0-bits on the right. Register RS is ORed with the extended
IM field and the result is placed into register RA.
Registers Altered
•RA
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
oris RA, RS, IM
25 RS RA IM
0 6 11 16 31
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