AMCC PPC405 - Page 170

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AMCC Proprietary 170

Revision 1.02 - September 10, 2007

PPC405 Processor

and

AND

Preliminary User’s Manual

and

AND

(RA) ← (RS) ∧ (RB)

The contents of register RS are ANDed with the contents of register RB; the result is placed into register RA.

Registers Altered

•RA

• CR[CR0]

LT, GT, EQ, SO

if Rc contains 1

Architecture Note

This instruction is part of the PowerPC User Instruction Set Architecture.

and RA, RS, RB Rc=0

and. RA, RS, RB Rc=1

31 RS RA RB 28 Rc

0 6 11 16 21 31