AMCC PPC405 - Page 281

AMCC Proprietary 281
Revision 1.02 - September 10, 2007
PPC405 Processor
mullhwu
Multiply Low Halfword to Word Unsigned
Preliminary User’s Manual
mullhwu
Multiply High Halfword to Word Unsigned
(RT)
0
:
31
← (RA)
16:31
x (RB)
16:31
unsigned
The low-order halfword of RA is multiplied by the low-order halfword of RB. The resulting unsigned product
replaces the contents of RT.
Registers Altered
•RT
• CR[CR0]
LT, GT, EQ, SO
if Rc contains 1
Architecture Note
This instruction is part of the Multiply-Accumulate instruction set extensions and complies with the architectural
requirements for APUs of the PowerPC Embedded Environment. As such, it is not part of the PowerPC Architec-
ture, nor is it part of the PowerPC Embedded Environment. Programs that use this instruction may not be portable
to other implementations.
mullhwu RT, RA, RB OE=0, Rc=0
mullhwu. RT, RA, RB OE=0, Rc=1
4RTRARB 392Rc
0 6 11 16 21 31