AMCC Proprietary 322
Revision 1.02 - September 10, 2007
PPC405 Processor
stwbrx
Store Word Byte-Reverse Indexed
Preliminary User’s Manual
stwbrx
Store Word Byte-Reverse Indexed
EA ← (RA|0) + (RB)
MS(EA, 4)
← (RS)
24:31
|| (RS)
16:23
|| (RS)
8:15
|| (RS)
0:7
An EA is formed by adding an index to a base address. The index is the contents of register RB. The base address
is 0 when the RA field is 0, and is the contents of register RA otherwise.
The contents of register RS are byte-reversed: the least significant byte becomes the most significant byte, the
next least significant byte becomes the next most significant byte, and so on. The result is stored into the word at
the EA.
If instruction bit 31 contains 1, the contents of CR[CR0] are undefined.
Registers Altered
•None
Invalid Instruction Forms
• Reserved fields
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
stwbrx RS, RA, RB
31 RS RA RB 662
0 6 11 16 21 31
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